Fisherman learning algorithm of the SOM realized in the CMOS technology

This study presents an idea of transistor level realization of the fisherman learning algorithm of Self-Organizing Maps (SOMs) which is described in [4]. The realization of this algorithm in hardware calls for a solution of several specific problems not present in software implementation. The main problem is related to an iterative nature of the adaptation process of the neighboring neurons positioned at particular rings surrounding the winning neuron. This makes the circuit structure of the SOM very complex. To come up with a feasible realization, we introduce some modifications to the original fisherman algorithm. Detailed simulations of the software model of the SOM show that these modifications do not have the negative impact on the learning process, and helps bring significant reduction of the circuit complexity. In consequence, a fully parallel adaptation of all neurons is possible, which makes the SOM very fast.